ARCHITECTURE OF PROCESSORS IN A HETEROGE NEOUS SYSTEM-ON-CHIP FOR EMBEDDED APPLICATIONS
Скачать PDF
Annotation: The article discusses an approach to designing system-on-a-chip ultra-large-scale integrated circuits intended for use in entry-level and mid-level embedded applications. In microelectronics, on the one hand, an increase in the density of components on a semiconductor crystal is observed, and on the other hand, a complication of products and functional requirements for them. Under these cond itions, it becomes possible to place several processor cores on a chip, which should be adapted to the corresponding subclasses of tasks typical of embedded systems. In practice, this means using a system on a chip with a heterogeneous architecture that in tegrates processor cores for various purposes. The article considers possible microarchitectures of processor cores applicable in systems on a chip of an embedded class, as well as the approach of dynamic redistribution of on-chip memory and peripheral dev ices between auxiliary processor cores operating under the control of a central processor.
Keywords: processor, microcontroller, system on chip, co-optimization, hardware architecture
For citation: Tarasov I.E. Architecture of processors in a heteroge neous system-on-chip for embedded applications // Electronic Scientific Journal IT-Standard. – 2022. – No. 1. – pp. .