Annotation

Annotation: The article discusses the design of software and hardware systems based on personal computers using locally connected hardware accelerators based on graphics processors (GPUs) or programmable logic integrated circuits (FPGAs) with FPGA or APSOC architecture. Since the set of peripheral devices included in a personal computer is limited, it determines the achievable data transfer rate. Thus, the computing performance of hardware accelerators added to the complex must be consistent with the technically achievable speed of transmitting input data to the accelerator and returning the calculated values. Interfacing with a personal computer also requires the presence of a corresponding interface controller in the connected accelerator. Options for connecting FPGA-based accelerators to a personal computer using the PCI Express interface to form a software and hardware complex designed for tasks such as digital signal processing, information security and regular expression recognition, implemented on the basis of an accelerator with parallel architecture, are considered.